1. Field of the Invention
This invention relates to on-chip power combining for high-power Schottky diode based frequency multipliers.
2. Description of the Related Art.
(Note: This application references a number of different publications as indicated throughout the specification by one or more reference numbers within brackets, e.g., [x]. A list of these different publications ordered according to these reference numbers can be found below in the section entitled “References.” Each of these publications is incorporated by reference herein.)
Solid-state multiplied local oscillator (LO) sources based on Schottky diode technology have been by far the preferred devices to drive the heterodyne receivers on imaging radars for concealed weapons detection and on-board planetary science and astrophysics space missions at submillimeter-waves and terahertz (THz) frequencies. The first generation of room-temperature Schottky multiplied LO sources exhibited up to 2 microwatts (μW) at 1.9 THz frequency (highest band of the HIFI instrument of the Herschel Space Observatory) by frequency multiplying from the available 100-150 milliwatt (mW) LO sources at W-band frequencies (75-100 Gigahertz, GHz) up to terahertz frequencies using a +2+3+3 (doubler, tripler, tripler) cascaded-multiplier configuration.
The recent progress in GaN-based power amplifier technology has recently demonstrated output power levels in excess of 5 Watts (W) from power amplifiers at W-band frequencies, making it now possible to conceive solid-state multiplied sources beyond 2 or 3 THz [2], as well as to develop multi-pixel heterodyne instruments for ground and space based applications in the THz range [3]. The increasing output power at W-band, together with the use of high-thermal conductivity substrates and power-combining schemes to increase the number of chips within the multipliers, have already led to world-record measured output powers up to 1.4 milliwatts (mW) at 0.9 THz, 60 microwatts (μW or uW) at 1.9 THz [1], and 18 μW at. 2.54 THz at the Jet Propulsion Laboratory (JPL). Using the novel GaN amplifier chains, power levels up to 10 mW at 600 GHz and >0.1 mW at 1.9 THz are envisioned using all-solid-state frequency multiplied sources.
Since the maximum power handled by a single chip is generally limited by the number of diodes in the chip, a number of multiplier chips need to be power-combined in order to make it possible to handle high amounts of power at the input and subsequently produce superior power levels at the output. However, the use of traditional power-combining topologies, already demonstrated below 1 THz, presents inconvenience beyond 1 THz. On the one hand, the use of Y-junction to divide/combine the input/output power at these frequency bands unnecessarily increases the electrical path of the signal at a range of frequencies where waveguide losses are considerably high. On the other hand, guaranteeing a perfect alignment of the very small chips during assembly, in order to preserve the balanced nature of the multiplier, is practically impossible, with a subsequent impact on the multiplier performance. Hence, novel power-combining schemes are very necessary in order to increase the power-handling capabilities of high-frequency multipliers, while preserving the multiplier circuit performance. The present invention satisfies this need.